Shakti Week
October 10th-12th,
Indian Institute of Technology, Madras
Topics of Interest
- 10th October, 2019 : Shakti Open Systems Day
- 11th and 12th October, 2019 : Microarchitectural Security Workshop (MAST 2019)
Speakers
Neel Gala
Title of the talk: Shakti C Class Intro
Neel Gala received his Bachelors degree (B-Tech) from the National Institute of Technology Warangal (NITW) in Electronics and Communication Engineering in year 2010. In the last quarter of 2010, he joined IIT-Madras as a project associate for a period of 18 months. During this period he was working on the design and development of some of the indigenous processors and micro-controllers which was partially funded by multiple Indian Defense agencies. By January 2012, he joined the Computer Science and Engineering Department at IIT-Madras (IITM) as a Direct PhD Candidate with Prof. V. Kamakoti as his advisor. He was also the recipient of the TCS-PHD fellowship for 2 consecutive years. He received his PhD Degree in the last quarter of 2016 has published more than 16 international articles and papers. Since then he has been leading the technical team of the SHAKTI Processor Systems and has recently co-founded InCore Semiconductors Pvt. Ltd. as well.
Suhas Shivanna
Title of the talk: Advances in HW Security (abstract)
Suhas Shivanna is a Distinguished Technologist and Strategist in Hewlett Packard Enterprise, Bangalore. He is currently working as a strategist for HPE Hybrid IT Business unit in the area of security and manageability and has 23+ years of IT experience designing hardware and software products for multiple domains like printers, transportation, traffic management and data centers. He and his team work in defining the security roadmap for HPE products along with driving the governance model and implementation of secure development lifecycle across HPE R & D and supply chain. He has 50+ patent applications/publications and works actively driving university relationship programs across multiple engineering colleges in India.
Nitya Ranganathan
Title of the talk: Shakti I Class Intro
Nitya Ranganathan is currently working on the i-class architecture in the Shakti group at IIT Madras. The i-class team aims to create one of the first out-of-order RISC-V processors in India. In the past, she has worked in AMD Research, Austin and AMD performance team, Bangalore. She earned her Ph.D in Computer Sciences from The University of Texas at Austin and B.E. in Computer Science and Engineering from College of Engineering, Guindy, Chennai. She is interested in computer architecture, microarchitecture, power/performance trade-offs, performance analysis and compiler optimizations.
T. Sridevi
Title of the talk: Shakti Processor for Nuclear Reactor Applications
Head Safety Instrumentation Section,
Electronics & Instrumentation Division,
Indira Gandhi Centre for Atomic Research (IGCAR) , Kalpakkam
She has specialized in design and development of computer based Safety system for Nuclear Reactor applications. She is involved in porting Reactor applications in SHAKTI processor based embedded system.
She has obtained Master’s degree in Software Systems from BITS , Pilani and her bachelor’s degree in Electronics and Communication Engineering from Thiagarajar College of Engineering , Madurai.
N. Anil
Title of the talk: Shakti Processor for Nuclear Reactor Applications
Scientific Officer, Electronics & Instrumentation Division,
Indira Gandhi Centre for Atomic Research (IGCAR) , Kalpakkam
His areas of interest include Embedded systems, EMI/EMC of electronic systems and Prognostics of Electronics. He is involved in porting Reactor applications in SHAKTI processor based embedded system.
He has obtained his Master’s degree in Nuclear Instrumentation from Homi Bhabha National Institute, Mumbai, and his bachelor’s degree in Electronics and Communication Engineering from JNTU, Hyderabad.
Paul George
Title of the talk: SafeRV-Shakti Functional Safety Architecture
Paul George Is a Project Associate at the Reconfigurable and Intelligent System Engineering Lab at the Department of Computer Science and Engineering , IIT Madras. Paul began contributing to the Shakti effort in 2017 and joined the project full time after completing his bachelor's degree in Electronics and Communication Engineering from the Shiv Nadar University - Dadri in 2018. His Present areas of interest include HPC, Functional safety and Formal methods in design and verification. He looks forward to joining a PhD Program in Computer Science later next year.
Vipul Vaidya
Title of the talk: SafeRV-Shakti Functional Safety Architecture
Vipul Vaidya is currently working as a Project Associate in the Shakti group at Dept. of Computer Science, IIT Madras. He is part of the development team of I-Class core, which is a RISC-V based out-of-order processor. He also works on Network-on-Chip architecture for mixed critical systems. Prior to joining the Shaki team, he worked at HCL Technologies as a Physical Design engineer and was part of the PD team responsible for tapeout of the Shakti C-Class core. He completed his B.E. in Electronics & Instrumentation from BITS Pilani, Pilani Campus in 2017. His areas of interest are broadly in processor microarchitecture, memory subsystem and on-chip interconnects.
Program
Day 1 : 10th October 2019
9:30 -- 10:00
Inaugural Address
Prof. V. Kamakoti, IIT Madras10:00 -- 10:30
Key Note Address
10:30 -- 11:15
Shakti Progress and Roadmap
G. S. Madhusudan, IIT Madras11:15 -- 11:30
Tea Break
11:30 -- 11:55
Shakti C Class
Neel Gala, IIT Madras11:55 -- 12:15
Shakti I Class Intro
Nitya Ranganathan, IIT Madras12:15 -- 13:15
Lunch
13:15 -- 14:00
Shakti Security
14:00 -- 14:45
Advances in HW Security
Suhas Shivanna, Hewlett Packard Enterprise14:45 -- 15:00
Tea Break
15:00 -- 15:45
SafeRV-Shakti Functional Safety Architecture
Vipul Vaidya and Paul George, IIT Madras15:45 -- 16:30
Shakti Processor for Nuclear Reactor Applications
T.Sridevi and N.Anil IGCAR, Kalpakam16:30 -- 17:30